发明授权
US08217463B2 Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods
有权
用于在由这种方法制造的半导体器件和半导体器件的制造期间保护栅极堆叠的方法
- 专利标题： Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods
- 专利标题（中）： 用于在由这种方法制造的半导体器件和半导体器件的制造期间保护栅极堆叠的方法
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申请号： US13021403申请日： 2011-02-04
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公开(公告)号： US08217463B2公开(公告)日： 2012-07-10
- 发明人: Rohit Pal , Michael Hargrove , Frank Bin Yang
- 申请人： Rohit Pal , Michael Hargrove , Frank Bin Yang
- 申请人地址： KY Grand Cayman
- 专利权人： GLOBALFOUNDRIES Inc.
- 当前专利权人： GLOBALFOUNDRIES Inc.
- 当前专利权人地址： KY Grand Cayman
- 代理机构： Ingrassia Fisher & Lorenz, P.C.
- 主分类号： H01L29/66
- IPC分类号： H01L29/66
摘要：
Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. Methods for fabricating a semiconductor device include providing a semiconductor substrate having an active region and a shallow trench isolation (STI) region. Epitaxial layer is formed on the active region to define a lateral overhang portion in a divot at the active region/STI region interface. A gate stack is formed having a first gate stack-forming layer overlying the semiconductor substrate. First gate stack-forming layer includes a non-conformal layer of metal gate-forming material which is directionally deposited to form a thinned break portion just below the lateral overhang portion. After the step of forming the gate stack, a first portion of the non-conformal layer is in the gate stack and a second portion is exposed. The thinned break portion at least partially isolates the first and second portions during subsequent etch chemistries.
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