Methods for multiple level program verify, memory devices, and memory systems are provided. In one such method, a series of programming pulses are applied to a memory cell to be programmed. A program verify pulse, at an initial program verify voltage, is applied to the memory cell after each programming pulse. The initial program verify voltage is a verify voltage that has been increased by a quick charge loss voltage. The quick charge loss voltage is subtracted from the initial program verify voltage after either a programming pulse has reached a certain reference voltage or a quantity of programming pulses has reached a pulse count threshold.