发明授权
- 专利标题： Circuit for biasing a well from three voltages
- 专利标题（中）： 用于从三个电压偏置井的电路
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申请号： US12489307申请日： 2009-06-22
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公开(公告)号： US08228115B1公开(公告)日： 2012-07-24
- 发明人: Edward Cullen
- 申请人： Edward Cullen
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 LeRoy D. Maunu
- 主分类号： H03K17/00
- IPC分类号： H03K17/00 ; H03K3/01
摘要：
A biasing circuit of an integrated circuit includes a well of the integrated circuit and a plurality of transistors disposed in the well. The transistors couple the well to three signals providing corresponding voltages. The transistors bias the well to an extreme one of the corresponding voltages for the three signals.
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