Invention Grant
- Patent Title: Germanium silicide layer including vanadium, platinum, and nickel
- Patent Title (中): 包括钒,铂和镍的锗硅化物层
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Application No.: US12926227Application Date: 2010-11-03
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Publication No.: US08232613B2Publication Date: 2012-07-31
- Inventor: Chang-wook Moon , Hyun-deok Yang , Joong S. Jeon , Hwa-sung Rhee , Nae-in Lee , Weiwei Chen
- Applicant: Chang-wook Moon , Hyun-deok Yang , Joong S. Jeon , Hwa-sung Rhee , Nae-in Lee , Weiwei Chen
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2007-0126911 20071207
- Main IPC: H01L31/119
- IPC: H01L31/119

Abstract:
Example embodiments relate to a method of forming a germanium (Ge) silicide layer, a semiconductor device including the Ge silicide layer, and a method of manufacturing the semiconductor device. A method of forming a Ge silicide layer according to example embodiments may include forming a metal layer including vanadium (V) on a silicon germanium (SiGe) layer. The metal layer may have a multiple-layer structure and may further include at least one of platinum (Pt) and nickel (Ni). The metal layer may be annealed to form the germanium silicide layer. The annealing may be performed using a laser spike annealing (LSA) method.
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