Invention Grant
- Patent Title: Method for forming isolation layer of semiconductor device
- Patent Title (中): 形成半导体器件隔离层的方法
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Application No.: US12833568Application Date: 2010-07-09
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Publication No.: US08242574B2Publication Date: 2012-08-14
- Inventor: Yu-Jin Lee
- Applicant: Yu-Jin Lee
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2009-0082701 20090902
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/762

Abstract:
A method for forming an isolation layer of a semiconductor device includes forming a trench in a substrate, forming a high-density plasma (HDP) oxide layer filling a portion of the trench, forming a spin-on-dielectric (SOD) oxide layer having a certain height over the HDP oxide layer, performing a thermal treatment, and forming an enhanced high-aspect-ratio process (eHARP) oxide layer filling another portion of the trench over the SOD oxide layer.
Public/Granted literature
- US20110049669A1 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE Public/Granted day:2011-03-03
Information query
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