A scan IC includes a switch circuit and a logic circuit. The switch circuit includes first and second transistors and a level shift circuit. First and second control signals that change between a logical “1” and a logical “0” are applied to an input terminal of the logic circuit. The logic circuit applies a third control signal to the first transistor and applies a fourth control signal to the second transistor based on the applied first and second control signals. A detection circuit is connected to the input terminal of the logic circuit. An abnormality of the scan IC is detected by the detection circuit.