发明授权
- 专利标题： Processor for executing highly efficient VLIW
- 专利标题（中）： 用于执行高效率VLIW的处理器
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申请号： US12705300申请日： 2010-02-12
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公开(公告)号： US08250340B2公开(公告)日： 2012-08-21
- 发明人: Shuichi Takayama , Nobuo Higaki
- 申请人： Shuichi Takayama , Nobuo Higaki
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP9-159048 19970616
- 主分类号： G06F15/80
- IPC分类号： G06F15/80
摘要：
A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.
公开/授权文献
- US20100169614A1 PROCESSOR FOR EXECUTING HIGHLY EFFICIENT VLIW 公开/授权日：2010-07-01
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