Invention Grant
- Patent Title: Routing nets over circuit blocks in a hierarchical circuit design
- Patent Title (中): 在分层电路设计中的路由网络过电路块
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Application No.: US12490023Application Date: 2009-06-23
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Publication No.: US08255855B2Publication Date: 2012-08-28
- Inventor: Yi Wu , Dajen Huang , Kalon S. Holdbrook
- Applicant: Yi Wu , Dajen Huang , Kalon S. Holdbrook
- Applicant Address: US CA Redwood Shores
- Assignee: Oracle America, Inc.
- Current Assignee: Oracle America, Inc.
- Current Assignee Address: US CA Redwood Shores
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Agent Laxman Sahasrabuddhe
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Some embodiments of the present invention provide a system that routes nets over circuit blocks in a hierarchical circuit design. During operation, the system can receive a set of circuit blocks. At least some terminals of the circuit blocks may be desired to be electrically linked together using a net which is expected to be routed over one or more circuit blocks. The system may divide an area associated with a block (e.g., an area in a metal layer which is situated above the block) into a set of tiles. Next, the system may assign costs to at least some of the tiles in the set of tiles. The system can then use the costs during routing. Note that using the costs of the tiles during routing makes it more likely that buffers can be used wherever required to meet slew and timing requirements.
Public/Granted literature
- US20100325600A1 ROUTING NETS OVER CIRCUIT BLOCKS IN A HIERARCHICAL CIRCUIT DESIGN Public/Granted day:2010-12-23
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