Technologies are described herein for assigning multiple frequency states within a serial I/O interface. Bits within the serial I/O stream may be placed in frequency states in addition to high and low logic states. Placing a serial I/O bit into a frequency state where the bit may be transitioned according to a set of allowed frequencies can extend the information represented by each bit slot of a cyclical data I/O bit stream beyond the typical two states of logic high and logic low. A transition counter may be provided for each bit slot of a serialized stream. Each transition counter may be incremented in response to the respective bit slot changing its state from its previous sampled state. A frequency state may be assigned to a bit slot in response to a respective transition counter range associated with that bit slot.