发明授权
US08266199B2 Specialized processing block for programmable logic device 有权
可编程逻辑器件专用处理块

Specialized processing block for programmable logic device
摘要:
A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations.
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