发明授权
- 专利标题： Multithreaded processor with multiple caches
- 专利标题（中）： 具有多个缓存的多线程处理器
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申请号： US10453226申请日： 2003-06-02
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公开(公告)号： US08266379B2公开(公告)日： 2012-09-11
- 发明人: Hee Choul Lee
- 申请人： Hee Choul Lee
- 申请人地址： DE
- 专利权人： Infineon Technologies AG
- 当前专利权人： Infineon Technologies AG
- 当前专利权人地址： DE
- 代理机构： Dickstein Shapiro LLP
- 主分类号： G06F12/06
- IPC分类号： G06F12/06
摘要：
A multithreaded processor includes multiple level-1 program caches and multiple level-1 data caches to decrease the likelihood of cache misses after thread switches. By using multiple level-1 caches, execution of a first thread does not cause instructions or data cached for a second thread to be replaced. Thus, when the second thread is being executed the occurrence of cache misses is reduced.
公开/授权文献
- US20040243765A1 Multithreaded processor with multiple caches 公开/授权日：2004-12-02
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