Invention Grant
US08274417B2 Coarse digital-to-analog converter architecture for voltage interpolation DAC
有权
用于电压内插DAC的粗数字到模拟转换器架构
- Patent Title: Coarse digital-to-analog converter architecture for voltage interpolation DAC
- Patent Title (中): 用于电压内插DAC的粗数字到模拟转换器架构
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Application No.: US12965651Application Date: 2010-12-10
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Publication No.: US08274417B2Publication Date: 2012-09-25
- Inventor: Jianhua Zhao , Shawn Wang
- Applicant: Jianhua Zhao , Shawn Wang
- Applicant Address: CN Shanghai
- Assignee: STMicroelectronics R&D (Shanghai) Co., Ltd.
- Current Assignee: STMicroelectronics R&D (Shanghai) Co., Ltd.
- Current Assignee Address: CN Shanghai
- Agency: Gardere Wynne Sewell LLP
- Priority: CN201010247802 20100804
- Main IPC: H03M1/66
- IPC: H03M1/66

Abstract:
For coarse resistor string DACs, a resistor string is placed in an array of columns and rows, each resistor tap is connected to a switch network, and a decoder is used to select switches to be closed such that sub-DAC voltage comes from the resistor taps connected to the selected switches. The voltages from each row are fed into multiplexers, wherein the multiplexers produce output voltages. DAC circuit designs extend the resolution of the output voltages by feeding them into a voltage interpolation amplifier. A method and apparatus are disclosed for implementing Gray code to design coarse DAC architecture for voltage interpolation such that the number of switches required by the circuit is significantly reduced, thereby decreasing required surface area, and improving glitch performance without increasing design complexity.
Public/Granted literature
- US20120032828A1 COARSE DIGITAL-TO-ANALOG CONVERTER ARCHITECTURE FOR VOLTAGE INTERPOLATION DAC Public/Granted day:2012-02-09
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