发明授权
US08280713B2 Automatic generation of test suite for processor architecture compliance
有权
自动生成用于处理器架构合规性的测试套件
- 专利标题: Automatic generation of test suite for processor architecture compliance
- 专利标题(中): 自动生成用于处理器架构合规性的测试套件
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申请号: US11735510申请日: 2007-04-16
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公开(公告)号: US08280713B2公开(公告)日: 2012-10-02
- 发明人: Allon Adir , Sigal Asaf , Laurent Fournier , Itai Jaeger
- 申请人: Allon Adir , Sigal Asaf , Laurent Fournier , Itai Jaeger
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G06F9/455
摘要:
A parametrically controlled model-based test generator automatically generates architectural compliance test suites for different implementations of a processor architecture, based on a set of architectural decisions chosen among optional behaviors for each implementation. Thus, different implementations of the same architecture can be easily supported by modifying the parameter values. In addition, ongoing changes to the architecture or comprehensive updates to the test suite can be easily handled by updating the architecture model or the coverage models, forgoing the need to review the whole, potentially huge, set of tests.
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