Invention Grant
- Patent Title: Flip chip mounting method and bump forming method
- Patent Title (中): 倒装芯片安装方法和凸块成型方法
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Application No.: US13091801Application Date: 2011-04-21
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Publication No.: US08283246B2Publication Date: 2012-10-09
- Inventor: Takashi Kitae , Seiichi Nakatani , Seiji Karashima , Yoshihisa Yamashita , Takashi Ichiryu
- Applicant: Takashi Kitae , Seiichi Nakatani , Seiji Karashima , Yoshihisa Yamashita , Takashi Ichiryu
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: JP2005-109645 20050406
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
The invention involves mounting a solder resin composition (6) including a solder powder (5a) and a resin (4) on the first electronic component (2); arranging such that the connecting terminals (3) of the first electronic component (2) and the electrode terminals (7) of the second electronic component (8) are facing each other; ejecting a gas (9a) from a gas generation source (1) included in the first electronic component (2) by heating the first electronic component (2) and the solder resin composition; and inducing the flow of the solder powder (5a) in the solder resin composition (6) by inducing convection of the gas (9a) in the solder resin composition (6), and electrically connecting the connecting terminals (3) and the electrode terminals (7) by self-assembly on the connecting terminals (3) and the electrode terminals (7). Through this are provided a flip chip packaging method that enables connecting, with high connection reliability, electrode terminals of a semiconductor chip wired with narrow pitch and connecting terminals of a circuit board, and a bump formation method for packaging on a circuit board.
Public/Granted literature
- US20110201195A1 FLIP CHIP MOUNTING METHOD AND BUMP FORMING METHOD Public/Granted day:2011-08-18
Information query
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