发明授权
- 专利标题: Semiconductor memory system including a plurality of semiconductor memory devices
- 专利标题(中): 半导体存储器系统包括多个半导体存储器件
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申请号: US12645104申请日: 2009-12-22
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公开(公告)号: US08284607B2公开(公告)日: 2012-10-09
- 发明人: Noboru Shibata , Hiroshi Sukegawa
- 申请人: Noboru Shibata , Hiroshi Sukegawa
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- 优先权: JP2007-030789 20070209
- 主分类号: G11C16/04
- IPC分类号: G11C16/04
摘要:
A communication line is connected to first and second chips, and held at a first signal level. A monitor circuit changes a signal level of the communication line from the first signal to a second signal level while one of the first and second chips uses a current larger than a reference current. When the signal level of the communication line is the second signal level, the other of the first and second chips is controlled to a wait state that does not transfer to an operating state of using a current larger than the reference current.
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