发明授权
- 专利标题: Semiconductor memory device with bit line of small resistance and manufacturing method thereof
- 专利标题(中): 具有小电阻位线的半导体存储器件及其制造方法
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申请号: US13161207申请日: 2011-06-15
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公开(公告)号: US08288227B2公开(公告)日: 2012-10-16
- 发明人: Satoshi Shimizu
- 申请人: Satoshi Shimizu
- 申请人地址: JP Kanagawa
- 专利权人: Renesas Electronics Corporation
- 当前专利权人: Renesas Electronics Corporation
- 当前专利权人地址: JP Kanagawa
- 代理机构: McDermott Will & Emery LLP
- 优先权: JP2003-287831 20030806
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A reduction of a resistance of a bit line of a memory cell array and a reduction of a forming area of the memory cell array are planed. Respective bit lines running at right angles to a word line are composed of a diffusion bit line formed in a semiconductor substrate and a linear metal bit line on an upper side of the diffusion bit line. The diffusion bit line is formed in a linear pattern on a lower side of the metal bit line in the same manner, and the metal bit line is connected with the diffusion bit line between the word lines. An interlayer insulating film is formed on the memory cell array, and the metal bit line is formed with being buried in it.
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