Memory networks and methods are provided. Machine intelligence is achieved by a plurality of linked processor units in which child modules receive input data. The input data are processed to identify patterns and/or sequences. Data regarding the observed patterns and/or sequences are passed to a patent module which may receive as inputs data from one or more child modules. the parent module examines its input data for patterns and/or sequences and then provides feedback to the child module or modules regarding the parent-level patterns that correlate with the child-level patterns. These systems and methods are extensible to large networks of interconnected processor modules.