发明授权
US08294218B2 Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate self-protection
有权
具有栅极自保护的集成电路的制造方法和具有栅极自保护的集成电路
- 专利标题： Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate self-protection
- 专利标题（中）： 具有栅极自保护的集成电路的制造方法和具有栅极自保护的集成电路
-
申请号： US12796386申请日： 2010-06-08
-
公开(公告)号： US08294218B2公开(公告)日： 2012-10-23
- 发明人: Badih El-Kareh , Scott Gerard Balster , Hiroshi Yasuda , Manfred Schiekofer
- 申请人： Badih El-Kareh , Scott Gerard Balster , Hiroshi Yasuda , Manfred Schiekofer
- 申请人地址： US TX Dallas
- 专利权人： Texas Instruments Incorporated
- 当前专利权人： Texas Instruments Incorporated
- 当前专利权人地址： US TX Dallas
- 代理商 Jacqueline J. Garner; Wade J. Brady, III; Fredrick J. Telecky, Jr.
- 优先权： DE102005044124 20050915
- 主分类号： H01L27/06
- IPC分类号： H01L27/06
摘要：
An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor layer with electrically active regions in which and on which the MOS device and the bipolar device are formed and electrically inactive regions for isolating the electrically active regions from each other. The MOS device comprises a gate structure and a body contacting structure, wherein the body contacting structure is formed of a base layer deposited in a selected region over an electrically active region of the semiconductor layer, and the body contacting structure is electrically connected with the gate structure. The base layer forming the body contacting structure also forms the base of the bipolar device. The present invention further relates to a method for fabricating such an integrated circuit.
公开/授权文献
信息查询
IPC分类:
