Invention Grant
- Patent Title: Integrated circuit comprising error correction logic, and a method of error correction
- Patent Title (中): 包括纠错逻辑的集成电路和纠错方法
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Application No.: US12593514Application Date: 2007-04-04
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Publication No.: US08296621B2Publication Date: 2012-10-23
- Inventor: Mathieu Villion
- Applicant: Mathieu Villion
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/IB2007/052780 WO 20070404
- International Announcement: WO2008/122845 WO 20081016
- Main IPC: H03M13/00
- IPC: H03M13/00
Abstract:
An integrated circuit comprises forward error correction (FEC) decoder logic being coupled to memory and arranged to receive data, comprising application data, from a host application process. The FEC decoder logic performs error detection upon the received data. Logic is further arranged to transmit error free application data back to the host application process prior to performing error correction; and store in memory only application data in which errors are detected.
Public/Granted literature
- US20100131822A1 INTEGRATED CIRCUIT COMPRISING ERROR CORRECTION LOGIC, AND A METHOD OF ERROR CORRECTION Public/Granted day:2010-05-27
Information query
IPC分类:
