发明授权
US08296702B2 Rectilinear covering method with bounded number of rectangles for designing a VLSI chip
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用于设计VLSI芯片的有限数量的矩形的直线覆盖方法
- 专利标题: Rectilinear covering method with bounded number of rectangles for designing a VLSI chip
- 专利标题(中): 用于设计VLSI芯片的有限数量的矩形的直线覆盖方法
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申请号: US12686412申请日: 2010-01-13
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公开(公告)号: US08296702B2公开(公告)日: 2012-10-23
- 发明人: Maharaj Mukherjee
- 申请人: Maharaj Mukherjee
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 H. Daniel Schnurmann
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A method for creating a rectilinear non-convex polygonal output representative of a component used to build a VLSI circuit chip from a plurality of points corresponding to a plurality of components of the chip includes: covering the plurality of points with a set of rectangles; creating a Voronoi diagram for the set of rectangles; forming a nearest neighbor tree for the Voronoi diagram; connecting a selected set of the rectangles corresponding to the nearest neighbor tree into a non-convex rectilinear polygon; and applying the non-convex rectilinear polygon to build the VLSI chip.
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