发明授权
US08298906B2 Trench decoupling capacitor formed by RIE lag of through silicon via (TSV) etch
失效
通过硅经过（TSV）蚀刻的RIE滞后形成的沟槽去耦电容器
- 专利标题： Trench decoupling capacitor formed by RIE lag of through silicon via (TSV) etch
- 专利标题（中）： 通过硅经过（TSV）蚀刻的RIE滞后形成的沟槽去耦电容器
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申请号： US12511545申请日： 2009-07-29
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公开(公告)号： US08298906B2公开(公告)日： 2012-10-30
- 发明人: Kerry Bernstein , Francis Roger White
- 申请人： Kerry Bernstein , Francis Roger White
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Roberts Mlotkowski Safran & Cole, P.C.
- 代理商 David Cain
- 主分类号： H01L21/20
- IPC分类号： H01L21/20
摘要：
A trench decoupling capacitor is formed using RIE lag of a through silicon via (TSV) etch. A method includes etching a via trench and a capacitor trench in a wafer in a single RIE process. The via trench has a first depth and the capacitor trench has a second depth less than the first depth due to RIE lag.
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