发明授权
- 专利标题： Timing adjustment circuit, timing adjustment method, and correction value computing method
- 专利标题（中）： 定时调整电路，时序调整方法和校正值计算方法
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申请号： US12784029申请日： 2010-05-20
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公开(公告)号： US08300483B2公开(公告)日： 2012-10-30
- 发明人: Hiroyuki Sano
- 申请人： Hiroyuki Sano
- 申请人地址： JP Yokohama
- 专利权人： Fujitsu Semiconductor Limited
- 当前专利权人： Fujitsu Semiconductor Limited
- 当前专利权人地址： JP Yokohama
- 代理机构： Arent Fox LLP
- 优先权： JP2009-123459 20090521
- 主分类号： G11C7/00
- IPC分类号： G11C7/00
摘要：
A timing adjustment circuit includes a determination unit for outputting delay information corresponding to a period of a first input signal, a storing unit for storing a plurality of correction values based on a circuit included in the determination unit, a correction unit for correcting the delay information based on a correction value selected from the plurality of the correction values, based on the delay information, and a first delay line for delaying a second input signal corresponding to the first input signal, based on the delay information corrected by the correction unit.
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