发明授权
US08307147B2 Interconnect and a method for designing an interconnect 有权
互连和设计互连的方法

  • 专利标题: Interconnect and a method for designing an interconnect
  • 专利标题(中): 互连和设计互连的方法
  • 申请号: US12066229
    申请日: 2005-09-09
  • 公开(公告)号: US08307147B2
    公开(公告)日: 2012-11-06
  • 发明人: Ori GorenYaron Netanel
  • 申请人: Ori GorenYaron Netanel
  • 申请人地址: US TX Austin
  • 专利权人: Freescale Semiconductor, Inc.
  • 当前专利权人: Freescale Semiconductor, Inc.
  • 当前专利权人地址: US TX Austin
  • 国际申请: PCT/IB2005/052955 WO 20050909
  • 国际公布: WO2007/029053 WO 20070315
  • 主分类号: G06F13/00
  • IPC分类号: G06F13/00
Interconnect and a method for designing an interconnect
摘要:
A method for designing an interconnect, the method includes determining an amount of input ports, an amount of output ports; characterized by selecting multiple modular components such as to form an interconnect, whereas each modular component is selected from a group of modular components that are verified by parametric verification environment. An interconnect that includes multiple input ports and multiple output ports, characterized by including multiple modular components; whereas each modular component is adapted to support a certain point-to-point protocol; whereas at least one modular component includes a sampling circuit and a bypass circuit, whereas the sampling circuit is selectively bypassed by the bypass circuit.
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