发明授权
- 专利标题： Semiconductor process
- 专利标题（中）： 半导体工艺
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申请号： US13175882申请日： 2011-07-03
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公开(公告)号： US08309459B1公开(公告)日： 2012-11-13
- 发明人: Wen-Chieh Wang , Yi-Nan Chen , Hsien-Wen Liu
- 申请人： Wen-Chieh Wang , Yi-Nan Chen , Hsien-Wen Liu
- 申请人地址： TW Taoyuan
- 专利权人： Nanya Technology Corporation
- 当前专利权人： Nanya Technology Corporation
- 当前专利权人地址： TW Taoyuan
- 代理机构： Jianq Chyun IP Office
- 主分类号： H01L21/44
- IPC分类号： H01L21/44
摘要：
A semiconductor process is provided. A substrate is provided in an etching apparatus, wherein first conductive patterns, a barrier layer and a patterned insulating layer are formed thereon. The first openings are formed between the first conductive patterns, the barrier layer covers surfaces of the first conductive patterns and the first openings, and the patterned insulating layer is formed on the first conductive patterns and has a plurality of second openings. The second openings expose the barrier layer on top corners of the first conductive patterns. Polymer layers are formed on the barrier layer, wherein a thickness of the polymer layer on the top corners of the first conductive pattern is larger than a thickness of the polymer layer on bottom portions of the first openings. An etching process is performed to remove the polymer layer and the barrier layer disposed on the bottom portions of the first openings.
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