发明授权
- 专利标题: Parameterized cell caching in electronic design automation
- 专利标题(中): 电子设计自动化中的参数化单元格缓存
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申请号: US12718850申请日: 2010-03-05
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公开(公告)号: US08312410B2公开(公告)日: 2012-11-13
- 发明人: William K. Foster , Scott I. Chase
- 申请人: William K. Foster , Scott I. Chase
- 申请人地址: US CA Mountain View
- 专利权人: Synopsys, Inc.
- 当前专利权人: Synopsys, Inc.
- 当前专利权人地址: US CA Mountain View
- 代理机构: Park, Vaughan, Fleming & Dowler LLP
- 代理商 Laxman Sahasrabuddhe
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G06F11/22 ; G06F15/04
摘要:
Some embodiments provide a system that improves performance during parameterized cell instantiation in an electronic design automation (EDA) application. During operation, the system persists evaluation results associated with a parameterized cell in the design within a session of the EDA application so that the evaluation results are available even after they have been flushed from memory. Further, the system can persist the evaluation results across sessions of the EDA application. Next, the system uses the persisted evaluation results to instantiate the parameterized cell without re-evaluating the parameterized cell. Finally, the system discards the persisted evaluation results based at least on a dependency associated with the parameterized cell.
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