A data transfer circuit includes: plural transfer lines transferring data; plural data output units connected to end portions of the respective transfer lines, detecting and outputting data transferred through the transfer lines with drive performance in accordance with a control signal; plural data transmission units arranged in parallel, transferring data to the corresponding transfer lines in response to selection signals; a selection control unit generating selection signals and outputting the selection signals to the corresponding data transmission units; and a control unit generating the control signal for controlling drive performance of the data output units to adjust data transfer delay and outputting the control signal to the respective output units. The transfer lines are arranged in the arrangement direction of the data transmission units and connected to the corresponding data output units. The control unit generates the control signal in accordance with the length of the data transfer distance.