发明授权
US08324660B2 Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
有权
具有减少的位错缺陷密度的晶格不匹配的半导体结构和用于器件制造的相关方法
- 专利标题： Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
- 专利标题（中）： 具有减少的位错缺陷密度的晶格不匹配的半导体结构和用于器件制造的相关方法
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申请号： US12845593申请日： 2010-07-28
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公开(公告)号： US08324660B2公开(公告)日： 2012-12-04
- 发明人: Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
- 申请人： Anthony J. Lochtefeld , Matthew T. Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas A. Langdo
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L21/02
- IPC分类号： H01L21/02
摘要：
Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
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