发明授权
- 专利标题: Limiter circuit
- 专利标题(中): 限制器电路
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申请号: US12996636申请日: 2008-06-09
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公开(公告)号: US08330520B2公开(公告)日: 2012-12-11
- 发明人: Tetsuo Furumiya , Junichi Ohi
- 申请人: Tetsuo Furumiya , Junichi Ohi
- 申请人地址: JP Kyoto
- 专利权人: Shimadzu Corporation
- 当前专利权人: Shimadzu Corporation
- 当前专利权人地址: JP Kyoto
- 代理机构: Cheng Law Group, PLLC
- 国际申请: PCT/JP2008/060566 WO 20080609
- 国际公布: WO2009/150709 WO 20091217
- 主分类号: H03K5/08
- IPC分类号: H03K5/08
摘要:
The limiter circuit of this invention is a limiter circuit which, by switching action of a pair of transistors, allows passage of only signal voltage components of an input signal voltage included in ranges of an upper limit signal voltage and a lower limit signal voltage. With this construction, the pair of transistors carry out comparisons between the input signal voltage and threshold signal voltages and line switching at the same time. Therefore, there is no influence of propagation delay speed, and no switching noise occurs at times of line switching. Since diodes are not used, a high-speed limiter circuit can be manufactured.
公开/授权文献
- US20110089989A1 LIMITER CIRCUIT 公开/授权日:2011-04-21
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