发明授权
- 专利标题： Power-saving receiver circuits, systems and processes
- 专利标题（中）： 省电接收器电路，系统和过程
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申请号： US12244060申请日： 2008-10-02
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公开(公告)号： US08331898B2公开(公告)日： 2012-12-11
- 发明人: Deric Wayne Waters , Karthik Ramasubramanian , Arun Raghupathy
- 申请人： Deric Wayne Waters , Karthik Ramasubramanian , Arun Raghupathy
- 申请人地址： US TX Dallas
- 专利权人： Texas Instruments Incorporated
- 当前专利权人： Texas Instruments Incorporated
- 当前专利权人地址： US TX Dallas
- 代理商 Wade J. Brady III; Frederick J. Telecky, Jr.
- 主分类号： H04B1/16
- IPC分类号： H04B1/16
摘要：
An electronic circuit includes a receiver circuit (BSP) operable to perform coherent summations having a coherent summations time interval, and a power control circuit (2130) coupled to said receiver circuit (BSP) and operable to impress a power controlling duty cycle (TON, TOFF) on the receiver circuit (BSP) inside the coherent summations time interval. Other circuits, devices, systems, methods of operation and processes of manufacture are also disclosed.
公开/授权文献
- US20090168843A1 POWER-SAVING RECEIVER CIRCUITS, SYSTEMS AND PROCESSES 公开/授权日：2009-07-02