Invention Grant
- Patent Title: Package process of stacked type semiconductor device package structure
- Patent Title (中): 封装工艺堆叠式半导体器件封装结构
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Application No.: US12766549Application Date: 2010-04-23
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Publication No.: US08338235B2Publication Date: 2012-12-25
- Inventor: Meng-Jen Wang
- Applicant: Meng-Jen Wang
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: J.C. Patents
- Priority: TW99104480A 20100211
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A package process is provided. The package process includes: disposing a semiconductor substrate on a carrier, wherein the semiconductor substrate has plural contacts at a side facing the carrier; thinning the semiconductor substrate from a back side of the semiconductor substrate and then forming plural through silicon vias in the thinned semiconductor substrate; forming plural first pads on the semiconductor substrate, wherein the first pads respectively connected to the through silicon vias; bonding plural chips to the semiconductor substrate, wherein the chips are electrically connected to the corresponding pads; forming a molding compound on the semiconductor substrate to cover the chips and the first pads; separating the semiconductor substrate and the carrier and then forming plural solder balls on the semiconductor substrate; and sawing the molding compound and the semiconductor substrate.
Public/Granted literature
- US20110195545A1 PACKAGE PROCESS Public/Granted day:2011-08-11
Information query
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