发明授权
US08344749B2 Through carrier dual side loop-back testing of TSV die after die attach to substrate
有权
通过载体双端回路测试TSV裸片裸片附着于基板上
- 专利标题: Through carrier dual side loop-back testing of TSV die after die attach to substrate
- 专利标题(中): 通过载体双端回路测试TSV裸片裸片附着于基板上
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申请号: US12795376申请日: 2010-06-07
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公开(公告)号: US08344749B2公开(公告)日: 2013-01-01
- 发明人: Daniel Joseph Stillman , James L. Oborny , William John Antheunisse , Norman J. Armendariz , Ramyanshu Datta , Kenneth M. Butler , Margaret Simmons-Matthews
- 申请人: Daniel Joseph Stillman , James L. Oborny , William John Antheunisse , Norman J. Armendariz , Ramyanshu Datta , Kenneth M. Butler , Margaret Simmons-Matthews
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Steven A. Shaw; W. James Brady; Frederick J. Telecky, Jr.
- 主分类号: G01R31/02
- IPC分类号: G01R31/02
摘要:
A method of testing electronic assemblies including singulated TSV die attached to a ML package substrate, on a substrate carrier. The substrate carrier includes through-holes for allowing probe contact to the BGA substrate pads on a bottomside of the package substrate that are coupled to the frontside of the TSVs. Contactable TSV tips on the bottomside of the TSV die are contacted with a topside coupler that includes a pattern of coupling terminals that matches a layout of at least a portion of the TSV tips or pads coupled to the TSV tips. The topside coupler electrically connects pairs of coupling terminals to provide a plurality of TSV loop back paths. The BGA substrate pads are contacted with a plurality of probes tips that extend through the through-holes to couple to the frontside of the TSVs. Electrical testing is performed across the electronic assembly to obtain at least one test parameter.