Invention Grant
- Patent Title: Method and mechanism for performing timing aware via insertion
- Patent Title (中): 通过插入执行定时感知的方法和机制
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Application No.: US12345604Application Date: 2008-12-29
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Publication No.: US08347248B2Publication Date: 2013-01-01
- Inventor: Tatjana Serdar , Olivier Omedes
- Applicant: Tatjana Serdar , Olivier Omedes
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method and system to insert redundant vias while preserving timing is disclosed. The system and method preserve the timing during redundant via insertion, which utilizes incremental timing and extraction updates. A budgeting based approach and a path based approach to the method are disclosed. The budgeting approach is faster, while the path based method has a better insight of the worst slack/slew for the entire design.
Public/Granted literature
- US20090113366A1 METHOD AND MECHANISM FOR PERFORMING TIMING AWARE VIA INSERTION Public/Granted day:2009-04-30
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