Invention Grant
- Patent Title: Stress detection within an integrated circuit having through silicon vias
- Patent Title (中): 通过硅通孔的集成电路中的应力检测
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Application No.: US12805025Application Date: 2010-07-07
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Publication No.: US08347728B2Publication Date: 2013-01-08
- Inventor: Robert Campbell Aitken
- Applicant: Robert Campbell Aitken
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G01B7/16
- IPC: G01B7/16

Abstract:
An integrated circuit 2 is formed of multiple wafer layers 4, 6, 8, 10 arranged in a stack and connected with through silicon vias 12. Mechanical strain sensors 26, 28, 30, 32 in the form of ring oscillators are provided proximal to the through silicon vias 12 and detect mechanical strain associated with the through silicon via 12. The measured mechanical strain may be used to dynamically adjust operating parameters of the integrated circuit either as a whole or in regions where the mechanical strain is detected. The operating parameters adjusted can include clock frequency, operating voltage and heat generation.
Public/Granted literature
- US20120006122A1 Stress detection within an integrated circuit having through silicon vias Public/Granted day:2012-01-12
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