Invention Grant
- Patent Title: Use of device assembly for a generalization of three-dimensional metal interconnect technologies
- Patent Title (中): 使用器件组件来推广三维金属互连技术
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Application No.: US12792565Application Date: 2010-06-02
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Publication No.: US08349653B2Publication Date: 2013-01-08
- Inventor: Pirooz Parvarandeh
- Applicant: Pirooz Parvarandeh
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Advent IP, P.C., L.L.P.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
An assembly process properly positions and align a plurality of first die within a carrier substrate. The first die are positioned within cavities formed in the carrier substrate. The carrier substrate is then aligned with a second substrate having a plurality of second die fabricated therein. The first die and the second die are fabricated using different technologies. Aligning the carrier substrate and the second substrate aligns the first die with the second die. One or more first die can be aligned with each second die. Once aligned, a wafer bonding process is performed to bond the first die to the second die. In some cases, the carrier substrate is removed, leaving behind the first die bonded to the second die of the second substrate. In other cases, the carrier substrate is left in place as a cap. The second substrate is then cut to form die stacks.
Public/Granted literature
- US20110300668A1 USE OF DEVICE ASSEMBLY FOR A GENERALIZATION OF THREE-DIMENSIONAL METAL INTERCONNECT TECHNOLOGIES Public/Granted day:2011-12-08
Information query
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