Invention Grant
US08349657B2 Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices
有权
在器件周围的周边区域的凹陷区域中形成导电柱的半导体器件和方法,用于与其他器件的电互连
- Patent Title: Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices
- Patent Title (中): 在器件周围的周边区域的凹陷区域中形成导电柱的半导体器件和方法,用于与其他器件的电互连
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Application No.: US13423263Application Date: 2012-03-18
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Publication No.: US08349657B2Publication Date: 2013-01-08
- Inventor: Byung Tai Do , Reza A. Pagaila , Linda Pei Ei Chua
- Applicant: Byung Tai Do , Reza A. Pagaila , Linda Pei Ei Chua
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50

Abstract:
A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A first insulating layer is formed over the die. A recessed region with angled sidewall is formed in the peripheral area. A first conductive layer is formed over the first insulating layer outside the recessed region and further into the recessed region. A conductive pillar is formed over the first conductive layer within the recessed region. A second insulating layer is formed over the first insulating layer, conductive pillar, and first conductive layer such that the conductive pillar is exposed from the second insulating layer. A dicing channel partially through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the conductive pillar.
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