Invention Grant
US08349663B2 Vertical diode based memory cells having a lowered programming voltage and methods of forming the same
有权
具有降低的编程电压的基于垂直二极管的存储单元及其形成方法
- Patent Title: Vertical diode based memory cells having a lowered programming voltage and methods of forming the same
- Patent Title (中): 具有降低的编程电压的基于垂直二极管的存储单元及其形成方法
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Application No.: US11864848Application Date: 2007-09-28
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Publication No.: US08349663B2Publication Date: 2013-01-08
- Inventor: S. Brad Herner , Tanmay Kumar
- Applicant: S. Brad Herner , Tanmay Kumar
- Applicant Address: US CA Milpitas
- Assignee: SanDisk 3D LLC
- Current Assignee: SanDisk 3D LLC
- Current Assignee Address: US CA Milpitas
- Agency: Dugan & Dugan, PC
- Main IPC: H01L21/82
- IPC: H01L21/82

Abstract:
In a first aspect, a method for forming a non-volatile memory cell is provided. The method includes (1) forming a metal-insulator-metal (MIM) antifuse stack including (a) a first metal layer; (b) a silicon dioxide, oxynitride or silicon nitride antifuse layer formed above the first metal layer; and (c) a second metal layer formed above the antifuse layer. The method also includes (2) forming a contiguous p-i-n diode above the MIM antifuse stack, the contiguous p-i-n diode comprising deposited semiconductor material; (3) forming a layer of a silicide, silicide-germanide, or germanide in contact with the deposited semiconductor material; and (4) crystallizing the deposited semiconductor material in contact with the layer of silicide, silicide-germanide, or germanide. The memory cell comprises the contiguous p-i-n diode and the MIM antifuse stack. Other aspects are provided.
Public/Granted literature
- US20090085154A1 VERTICAL DIODE BASED MEMORY CELLS HAVING A LOWERED PROGRAMMING VOLTAGE AND METHODS OF FORMING THE SAME Public/Granted day:2009-04-02
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