Invention Grant
- Patent Title: Method of manufacturing a semiconductor device having a super junction
- Patent Title (中): 具有超结的半导体器件的制造方法
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Application No.: US13024347Application Date: 2011-02-10
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Publication No.: US08349693B2Publication Date: 2013-01-08
- Inventor: Takumi Shibata , Shouichi Yamauchi
- Applicant: Takumi Shibata , Shouichi Yamauchi
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2007-128565 20070514
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A semiconductor device includes a silicon substrate having a (110)-oriented surface, a PN column layer disposed on the (110)-oriented surface, a channel-forming layer disposed on the PN column layer, a plurality of source regions disposed at a surface portion of the channel-forming layer, and gate electrodes penetrate through the channel-forming layer. The PN column layer includes first columns having a first conductivity type and second columns having a second conductivity type which are alternately arranged in such a manner that the first columns contact the second columns on (111)-oriented surfaces, respectively. The gate electrodes are adjacent to the source regions, respectively, and each of the gate electrodes has side surfaces that cross the contact surfaces of the first columns and the second columns in a plane of the silicon substrate.
Public/Granted literature
- US20110136308A1 SEMICONDUCTOR DEVICE HAVING SUPER JUNCTION AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2011-06-09
Information query
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