Invention Grant
- Patent Title: Integrated circuit with stress inserts
- Patent Title (中): 集成电路与应力插入
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Application No.: US12697027Application Date: 2010-01-29
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Publication No.: US08350253B1Publication Date: 2013-01-08
- Inventor: Bei Zhu , Hong-Tze Pan , Bang-Thu Nguyen , Qi Lin , Zhiyuan Wu , Ping-Chin Yeh , Jae-Gyung Ahn , Yun Wu
- Applicant: Bei Zhu , Hong-Tze Pan , Bang-Thu Nguyen , Qi Lin , Zhiyuan Wu , Ping-Chin Yeh , Jae-Gyung Ahn , Yun Wu
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Scott Hewett; Gerald Chan
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
An integrated circuit (“IC”) fabricated on a semiconductor substrate has an active gate structure formed over a channel region in the semiconductor substrate. A dummy gate structure is formed on a dielectric isolation structure. The dummy gate structure and the active gate structure have the same width. A sidewall spacer on the dummy gate structure overlies a semiconductor portion between a strain-inducing insert and the dielectric isolation structure.
Information query
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