Invention Grant
- Patent Title: Method of forming an MOS transistor and structure therefor
- Patent Title (中): 一种形成MOS晶体管的方法及其结构
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Application No.: US11840826Application Date: 2007-08-17
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Publication No.: US08350318B2Publication Date: 2013-01-08
- Inventor: Gordon M. Grivna , Francine Y. Robb
- Applicant: Gordon M. Grivna , Francine Y. Robb
- Applicant Address: US AZ Phoenix
- Assignee: Semiconductor Components Industries, LLC
- Current Assignee: Semiconductor Components Industries, LLC
- Current Assignee Address: US AZ Phoenix
- Agent Robert F. Hightower
- Main IPC: H01L29/66
- IPC: H01L29/66
Abstract:
In one embodiment, an MOS transistor is formed with trench gates. The gate structure of the trench gates generally has a first insulator that has a first thickness in one region of the gate and a second thickness in a second region of the gate.
Public/Granted literature
- US20090045440A1 METHOD OF FORMING AN MOS TRANSISTOR AND STRUCTURE THEREFOR Public/Granted day:2009-02-19
Information query
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