Invention Grant
- Patent Title: Top layers of metal for high performance IC's
- Patent Title (中): 高性能IC的金属顶层
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Application No.: US12691597Application Date: 2010-01-21
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Publication No.: US08350386B2Publication Date: 2013-01-08
- Inventor: Mou-Shiung Lin , Jin-Yuan Lee
- Applicant: Mou-Shiung Lin , Jin-Yuan Lee
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L23/522
- IPC: H01L23/522

Abstract:
The present invention adds one or more thick layers of polymer dielectric and one or more layers of thick, wide metal lines on top of a finished semiconductor wafer, post passivation. The thick, wide metal lines may be used for long signal paths and can also be used for power buses or power planes, clock distribution networks, critical signal, and re-distribution of I/O pads for flip chip applications. Photoresist define electroplating, sputter/etch, or dual and triple damascene techniques are used for forming the metal lines and via fill.
Public/Granted literature
- US20100117236A1 TOP LAYERS OF METAL FOR HIGH PERFORMANCE IC'S Public/Granted day:2010-05-13
Information query
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