Invention Grant
- Patent Title: Low voltage self calibrated CMOS peak detector
- Patent Title (中): 低电压自校准CMOS峰值检测器
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Application No.: US13123844Application Date: 2009-10-07
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Publication No.: US08350597B2Publication Date: 2013-01-08
- Inventor: Jean-Robert Tourret
- Applicant: Jean-Robert Tourret
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP08290964 20081015
- International Application: PCT/IB2009/054389 WO 20091007
- International Announcement: WO2010/044012 WO 20100422
- Main IPC: H03K5/153
- IPC: H03K5/153

Abstract:
The present invention relates to a low-voltage self-calibrated peak detector (100). Using a two-step calibration process that compensates the offset errors introduced by the respective first, second and third comparators (122, 128, 130), the peak detection is made accurate whatever temperature, process or mismatch spreads. Its input bandwidth can be as high as the bandwidth of an operational amplifier of unity gain. In a rail-to-rail configuration, it can be implemented into a fully differential low-voltage self-calibrated CMOS peak detector (200), which can have a very high conversion gain (α) and a very high input signal dynamic ranging.
Public/Granted literature
- US20110241732A1 LOW VOLTAGE SELF CALIBRATED CMOS PEAK DETECTOR Public/Granted day:2011-10-06
Information query
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