Invention Grant
- Patent Title: Relaxation oscillator with low power consumption
- Patent Title (中): 松弛振荡器具有低功耗
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Application No.: US13159440Application Date: 2011-06-14
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Publication No.: US08350631B1Publication Date: 2013-01-08
- Inventor: Sanjay K. Wadhwa , Deependra K. Jain
- Applicant: Sanjay K. Wadhwa , Deependra K. Jain
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc
- Current Assignee: Freescale Semiconductor, Inc
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: H03K3/02
- IPC: H03K3/02

Abstract:
A relaxation oscillator for generating oscillator signal includes a ramp voltage generating circuit, a reference voltage generating circuit, a reference voltage switching circuit, and a digital logic circuit. The reference voltage generating circuit generates one or more reference voltages and the ramp voltage generating circuit generates one or more ramp voltages. The ramp voltages are compared with each of the reference voltages by sequentially switching the reference voltages using a reference voltage switching signal generated by the reference voltage switching circuit. The oscillator signal is generated by the digital logic circuit based on the results of the comparisons.
Public/Granted literature
- US20120319788A1 RELAXATION OSCILLATOR WITH LOW POWER CONSUMPTION Public/Granted day:2012-12-20
Information query
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