The A/D conversion circuit according to one aspect of the present invention includes: a first sampling capacitor; a first sampling switch; a buffer circuit; a second sampling capacitor; a second sampling switch; a first converter; a first reset switch; and a second reset switch. The first and second sampling switches are turned on to track voltage to the first sampling capacitor and to sample buffer voltage to the second sampling capacitor through the buffer circuit. The first sampling switch is turned off to hold voltage. The second sampling switch is turned off so that the first converter reads the voltage from the second sampling capacitor to perform A/D conversion thereon. After that, the first and second reset switches reset the first and second sampling capacitors.