In a plasma display panel, abnormal discharge in address periods is suppressed to enhance image display quality. The scan electrode driving circuit generates a first falling down-ramp voltage i.e. down-ramp voltage L2 or down-ramp voltage L4, in initializing periods, generates sustain pulses in sustain periods, generates a rising up-ramp voltage, i.e. erasing up-ramp voltage L3, at the ends of the sustain periods, and applies the voltages to the scan electrodes. After generating the sustain pulses in the sustain periods, the scan electrode driving circuit generates a second down-ramp voltage, i.e. erasing down-ramp voltage L5, which has a portion falling with a gradient gentler than that of down-ramp voltage L2 and down-ramp voltage L4. After generating erasing down-ramp voltage L5, the scan electrode driving circuit generates erasing up-ramp voltage L3 and applies the voltage to the scan electrodes.