Buffer amplifier with minimized power consumption and display driver including the same
Abstract:
A buffer amplifier includes an input stage and an output stage. The input stage has input high and low power voltages applied thereon for generating at least one transmission signal from an input signal. The output stage has output high and low power voltages applied thereon for generating an output signal from the at least one transmission signal. A first difference between the output high and low power voltages is less than a second difference between the input high and low power voltages for reducing the dynamic power consumption of the output stage.
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