Invention Grant
- Patent Title: Ferroelectric random access memory and memory system
- Patent Title (中): 铁电随机存取存储器和存储器系统
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Application No.: US12873119Application Date: 2010-08-31
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Publication No.: US08351237B2Publication Date: 2013-01-08
- Inventor: Ryousuke Takizawa
- Applicant: Ryousuke Takizawa
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Priority: JP2009-199536 20090831
- Main IPC: G11C11/22
- IPC: G11C11/22

Abstract:
Certain embodiments provide a ferroelectric random access memory comprising a first buffer, a second buffer, a third buffer, a first controlling unit, a second controlling unit, a memory cell array, a sense amplifier circuit, and a third controlling unit. The first buffer outputs a first signal changed from a first value to a second value based on notification of power-down. The second buffer stops supply of inner clock signal with the change of the first signal from the first value to the second value. The third buffer receives an address signal corresponding to data to be read or written. The first controlling unit receives a command signal. The second controlling unit generates a basic signal that has a third value when the command signal indicates a bank active command and has a fourth value when the command signal indicates a precharge command and the first signal has the second value. The sense amplifier circuit reads data via a pair of bit lines from the memory cell corresponding to the address signal. The third controlling unit controls write back to the memory cell from which the data are read so as to be performed after an elapse of a predetermined time from the time the basic signal has the third value and when the basic signal has the fourth value.
Public/Granted literature
- US20110051491A1 FERROELECTRIC RANDOM ACCESS MEMORY AND MEMORY SYSTEM Public/Granted day:2011-03-03
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