Invention Grant
US08351286B2 Test method for screening manufacturing defects in a memory array
有权
用于筛选存储器阵列中的制造缺陷的测试方法
- Patent Title: Test method for screening manufacturing defects in a memory array
- Patent Title (中): 用于筛选存储器阵列中的制造缺陷的测试方法
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Application No.: US12842605Application Date: 2010-07-23
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Publication No.: US08351286B2Publication Date: 2013-01-08
- Inventor: Yin Chin Huang , Chu Pang Huang
- Applicant: Yin Chin Huang , Chu Pang Huang
- Applicant Address: TW Hsin-Chu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Alston & Bird LLP
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A method of screening manufacturing defects at a memory array may include programming a background pattern of physically inverse data along conductive lines extending in a first direction. The programming may include providing a program conductive line with a high value. The method may further include programming a memory cell at an intersection of the program conductive line and a conductive line extending in a second direction to a selected high value, and determining whether a cell initially at a low value and associated with a conductive line extending in the first direction and adjacent to the program conductive line is disturbed.
Public/Granted literature
- US20120020164A1 TEST METHOD FOR SCREENING MANUFACTURING DEFECTS IN A MEMORY ARRAY Public/Granted day:2012-01-26
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