Invention Grant
- Patent Title: Low power dual processor architecture for multi mode devices
- Patent Title (中): 用于多模式设备的低功耗双处理器架构
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Application No.: US13354377Application Date: 2012-01-20
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Publication No.: US08351985B2Publication Date: 2013-01-08
- Inventor: Ranganathan Krishnan , Albert S. Ludwin , William R. Gardner
- Applicant: Ranganathan Krishnan , Albert S. Ludwin , William R. Gardner
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Nicholas J. Pauley; Peter Michael Kamarchik; Jonathan T. Velasco
- Main IPC: H04B1/38
- IPC: H04B1/38 ; H04W52/02
Abstract:
A mobile computing device with multiple modes, for example, wireless communication and personal computing, has an application processor and a communication processor. In the computing mode, the application processor is the master processor. In the communication mode, the application processor is deenergized to conserve battery power, with the communication processor functioning as the master processor by accessing the device's peripheral bus using the memory interface of the communication processor.
Public/Granted literature
- US20120115456A1 LOW POWER DUAL PROCESSOR ARCHITECTURE FOR MULTI MODE DEVICES Public/Granted day:2012-05-10
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