Invention Grant
- Patent Title: Memory system with nonvolatile memory
- Patent Title (中): 具有非易失性存储器的内存系统
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Application No.: US12325021Application Date: 2008-11-28
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Publication No.: US08352672B2Publication Date: 2013-01-08
- Inventor: Takaya Suda
- Applicant: Takaya Suda
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-308778 20071129
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28 ; H03M13/00

Abstract:
A memory system includes a nonvolatile memory having a plurality of data blocks each of which is a unit of data erase and has a plurality of pages, each of the pages being a unit of data write, and a controller which checks whether or not the nonvolatile memory has been affected by power interruption at power-on time and, if the nonvolatile memory has been affected by power interruption, writes data to that first page in a first data block which has not been affected by power interruption.
Public/Granted literature
- US20090150600A1 MEMORY SYSTEM Public/Granted day:2009-06-11
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