Invention Grant
US08352793B2 Device testing method and architecture 失效
设备测试方法和架构

  • Patent Title: Device testing method and architecture
  • Patent Title (中): 设备测试方法和架构
  • Application No.: US12239878
    Application Date: 2008-09-29
  • Publication No.: US08352793B2
    Publication Date: 2013-01-08
  • Inventor: Yongman Lee
  • Applicant: Yongman Lee
  • Applicant Address: US CA Cupertino
  • Assignee: Apple Inc.
  • Current Assignee: Apple Inc.
  • Current Assignee Address: US CA Cupertino
  • Agency: Ropes & Gray LLP
  • Agent Jeffrey H. Ingerman
  • Main IPC: G06F11/00
  • IPC: G06F11/00
Device testing method and architecture
Abstract:
The same testing equipment can be used to test devices operating under different protocols. Where the testing protocol is slower than the native serial protocol of the high-speed serial link connecting the device processor to the component to be tested, the link may be adapted to carry the lower speed testing protocol. This may be accomplished by adding low-speed buffers to the circuits of the serial link, or the serial link may have a native low-speed protocol in addition to its high-speed protocol connections may be made to the pathways for the native low-speed protocol, or the testing protocol may be impressed on top of native low-speed protocol. Where the driver of the device being tested has limited number of pins, the test mode can be controlled by applying power to different power supply input pins.
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